Path delay fault diagnosis in combinational circuits with implicit fault enumeration

A new methodology involving effect-cause analysis has been demonstrated for the diagnosis of path delay faults. The paper illustrates a structural rep resentation, called the suspect circuit, of all the possible path delay fau lts in a faulty circuit. This representation has been used to design effici ent algorithms that enable us to manipulate the suspect faults without havi ng to enumerate them explicitly. Procedures for removing fault-free paths f rom the list of suspect faults have been implemented to improve the diagnos tic resolution. Moreover, efficient data structures are used to complement the procedures and reduce the memory footprint of the algorithms. Results i ndicate that the diagnostic resolution obtained is very high and includes a ll possible causes of the observed delay faults.