Constraint-based watermarking techniques for design IP protection

Digital system designs are the product of valuable effort and know-how. The ir embodiments, from software and hardware description language program dow n to device-level netlist and mask data, represent carefully guarded intell ectual property (IP). Hence, design methodologies based on IP reuse require new mechanisms to protect the rights of IP producers and owners. This pape r establishes principles of watermarking-based IP protection, where a water mark is a mechanism for identification that is: 1) nearly invisible to huma n and machine inspection; 2) difficult to remove, and 3) permanently embedd ed as an integral part of the design. Watermarking addresses IP protection by tracing unauthorized reuse and making untraceable unauthorized reuse as difficult as recreating given pieces of IP from scratch. We survey related work in cryptography and design methodology, then develop desiderata, metri cs, and concrete protocols for constraint-based watermarking at various sta ges of the very large scale integration (VLSI) design process. In particula r, we propose a new preprocessing approach that embeds watermarks as constr aints into the input of a black-box design tool and a new postprocessing ap proach that embeds watermarks as constraints into the output of a black-box design tool. To demonstrate that our protocols can be transparently integr ated into existing design flows, we use a testbed of commercial tools for V LSI physical design and embed watermarks into real-world industrial designs . We show that the implementation overhead is low-both in terms of central processing unit time and such standard physical design metrics as wirelengt h, layout area, number of vias, and routing congestion. We empirically show that in the placement and routing applications considered in our methods a chieve strong proofs of authorship are resistant to tampering and do not ad versely influence timing.