Characterization and stressing properties of polysilicon TFTs utilizing oxide films deposited using TEOS

In this work we investigated the structural and electrical characteristics of SiO2 films deposited by Low Pressure Chemical Vapor Deposition (LPCVD) u sing tetraethylorthosilicate (TEOS) under various deposition pressures and temperatures and their application as gate dielectrics in thin film transis tors. It was found using Fourier Transform InfraRed spectroscopy (FTIR) tha t films deposited at temperatures lower than 635 degreesC are carbon contam inated, so this temperature was considered as the lowest limit for depositi ng SiO2 films with an acceptable carbon contamination. The threshold voltag e of TFTs utilizing these oxides was correlated with the structural propert ies of the oxides. The degradation of the TFT transfer characteristics unde r various stressing gate bias values was studied and the evolution of the e lectrical parameters with stressing time was determined. The degradation of both the threshold voltage and the subthreshold swing exhibits a logarithm ic dependence with stressing time, indicating a charge trapping process occ urring in the oxide and at the polysilicon / SiO2 interface.