DOMAIN-SPECIFIC HIGH-LEVEL MODELING AND SYNTHESIS FOR ATM SWITCH PROTOTYPING

ATM switch, the core technology of an ATM networking system, is one of the major products in Fujitsu telecommunication business, However, cu rrent gate-level design methodology can no longer satisfy its stringen t time-to-market requirement. It becomes necessary to exploit high-lev el methodology to specify and synthesize the design at an abstraction level higher than logic gates. This paper presents our prototyping exp erience on domain-specific high-level modeling and synthesis for Fujit su ATM switch design. We propose a high-level design methodology using VHDL, where ATM switch architectural features are considered during b ehavior modeling, and a high-level synthesis compiler, MEBS, is protot yped to synthesize the behavior model down to a gate-level implementat ion. Since the specific ATM switch architecture is incorporated into b oth modeling and synthesis phases, a high-quality design is efficientl y derived. The synthesis results shows that given the design constrain ts, the proposed high-level design methodology can produce a gate-leve l implementation by MEBS with about 15% area reduction in shorter desi gn cycle when compared with manual design.