As the gap between processor and memory speeds continues to widen, met
hods for evaluating memory system designs before they are implemented
in hardware are becoming increasingly important. One such method, trac
e-driven memory simulation, has been the subject of intense interest a
mong researchers and has, as a result, enjoyed rapid development and s
ubstantial improvements during the past decade. This article surveys a
nd analyzes these developments by establishing criteria for evaluating
trace-driven methods, and then applies these criteria to describe, ca
tegorize, and compare over 50 trace-driven simulation tools. We discus
s the strengths and weaknesses of different approaches and show that n
o single method is best when all criteria, including accuracy, speed,
memory, flexibility, portability, expense, and ease of use are conside
red. In a concluding section, we examine fundamental limitations to tr
ace-driven simulation, and survey some recent developments in memory s
imulation that may overcome these bottlenecks.