Performance analysis of BusNet protocol for backplane bus-based interprocessor communication

Nowadays, backplane bus-based multiprocessor systems often utilize the stan dard network protocol such as TCP/IP for communication between processors o n the backplane bus. In such systems, it is common for the backplane bus to emulate the standard MAC protocols such as CSMA/CD. This paper aims to ana lyze the delay performance of the MAC emulation-based backplane network by constructing queueing models based on detailed bus operations. For this pur pose, we choose BusNet as a target protocol, BusNet is an ANSI standard net work protocol and its specification contains basic operations commonly used in most backplane buses. We investigate the throughput-delay characteristi cs in terms of packet size, block transfer scale, and arbitration scheme. W e also compare the packet delay in BusNet with the IEEE 802.3 CSMA/CD netwo rk which BusNet is expected to be compatible with. The simulation result sh ows how an optimal block transfer scale can be determined in respect of the performance trade-off between BusNet and other real-time traffics. (C) 200 1 Elsevier Science B.V. All rights reserved.