Improving the RF performance of 0.18 mu m CMOS with deep n-well implantation

Citation
Jg. Su et al., Improving the RF performance of 0.18 mu m CMOS with deep n-well implantation, IEEE ELEC D, 22(10), 2001, pp. 481-483
Citations number
14
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE ELECTRON DEVICE LETTERS
ISSN journal
07413106 → ACNP
Volume
22
Issue
10
Year of publication
2001
Pages
481 - 483
Database
ISI
SICI code
0741-3106(200110)22:10<481:ITRPO0>2.0.ZU;2-#
Abstract
The radio-frequency (RF) figures of merit of 0.18 mum complementary metal-o xide-semiconductor (CMOS) technology are investigated by evaluating the uni ty-current-gain cutoff frequency (F-t) and maximum oscillation frequency (F -max). The device fabricated with an added deep n-well structure is shown t o greatly enhance both the cutoff frequency and the maximum oscillation fre quency, with negligible dc disturbance. Specifically, 18% increase in F-t a nd 25% increase in F-max are achieved. Since the deep n-well implant can be easily adopted in a standard CMOS process, the approach appears to be very promising for future CMOS RF applications.