Numerical confirmation of inelastic trap-assisted tunneling (ITAT) as SILCmechanism

Citation
Tk. Kang et al., Numerical confirmation of inelastic trap-assisted tunneling (ITAT) as SILCmechanism, IEEE DEVICE, 48(10), 2001, pp. 2317-2322
Citations number
21
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON ELECTRON DEVICES
ISSN journal
00189383 → ACNP
Volume
48
Issue
10
Year of publication
2001
Pages
2317 - 2322
Database
ISI
SICI code
0018-9383(200110)48:10<2317:NCOITT>2.0.ZU;2-F
Abstract
This paper presents a quite comprehensive procedure covering both the stres s-induced leakage current (SILC) and oxide breakdown, achieved by balancing systematically the modeling and experimental works. The underlying model a s quoted in the literature features three key parameters: the tunneling rel axation time tau, the neutral electron trap density N-t, and the trap energ y level E-t. First of all, 7-nm thick oxide MOS devices with wide range oxi de areas are thoroughly characterized in terms of the optically induced tra p filling, the charge-to-breakdown statistics, the gate voltage development s with the time, and the SILC I-V. The former three are involved together w ith a percolation oxide breakdown model to build N-t explicitly as function of the stress electron fluence. Then the overall tunneling probability is calculated, with which a best fitting to SILC I-V furnishes tau of 4.0 x 10 (-13) s and E-t of 3.4 eV. The extracted tau is found to match exactly that extrapolated from existing data. Such striking consistencies thereby provi de evidence that inelastic trap-assisted tunneling (ITAT) is indeed the SIL C mechanism. Differences and similarities of the involved physical paramete rs between different studies are compared as well.