Turbo decoders inherently require large hardware for VLSI implementation as
a large amount of memory is required to store incoming data and intermedia
te computation results. Design of highly efficient Turbo decoders requires
reduction of hardware size and power consumption. In this paper, finite pre
cision effects on the performance of Turbo decoders are analyzed and the op
timal word lengths of variables are determined considering tradeoffs betwee
n the performance and the hardware cost. It is shown that the performance d
egradation from the infinite precision is negligible if 4 bits are used for
received bits and 6 bits for the extrinsic information. The state metrics
normalization method suitable for Turbo decoders is also discussed. This me
thod requires small amount of hardware and its speed does not depend on the
number of states. Furthermore, we propose a novel adaptive decoding approa
ch which does not lead to performance degradation and is suitable for VLSI
implementation.