Integrated power transistor size optimisation

Authors
Bosc, JM
Citation
Jm. Bosc, Integrated power transistor size optimisation, MICROEL REL, 41(9-10), 2001, pp. 1671-1676
Citations number
5
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
MICROELECTRONICS RELIABILITY
ISSN journal
00262714 → ACNP
Volume
41
Issue
9-10
Year of publication
2001
Pages
1671 - 1676
Database
ISI
SICI code
0026-2714(200109/10)41:9-10<1671:IPTSO>2.0.ZU;2-S
Abstract
In the present work, we present the strategy implemented to optimise for ec onomical purpose the size of integrated power transistors regarding reliabi lity constraints. The approach taken is based on the study of the real appl ication using simulation and reliability testing. An optimisation flow is a lso proposed. (C) 2001 Elsevier Science Ltd. All rights reserved.