Ultra-thin gate oxides prepared by alternating current anodization of silicon followed by rapid thermal anneal

Citation
Yc. Chen et al., Ultra-thin gate oxides prepared by alternating current anodization of silicon followed by rapid thermal anneal, SOL ST ELEC, 45(9), 2001, pp. 1531-1536
Citations number
10
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science","Eletrical & Eletronics Engineeing
Journal title
SOLID-STATE ELECTRONICS
ISSN journal
00381101 → ACNP
Volume
45
Issue
9
Year of publication
2001
Pages
1531 - 1536
Database
ISI
SICI code
0038-1101(200109)45:9<1531:UGOPBA>2.0.ZU;2-0
Abstract
An advanced method to prepare ultra-thin (<30 <Angstrom>) anodic oxides is proposed. The voltage polarity applied to the silicon wafer is switched bet ween a positive and a negative value periodically during anodic oxidation. It is belived that the more effective negative charges causing a barrier he ight for electron tunneling are generated in the oxide when a negative bias is applied to the wafer. In addition, the compensation effect of anion red istribution during voltage polarity switching contributes to eliminating th e number of leakage paths in the oxide. Therefore, oxides prepared by this technique and followed by rapid thermal anneal exhibit lower leakage curren t and higher breakdown endurance than the conventional constant-voltage ano dic oxides and the rapid thermal oxides do. In addition, various switching conditions are investigated to examine the effects of negative bias and the switching frequency upon the characteristics of oxides so that a better gr owth condition can be found to grow high-quality gate oxides. (C) 2001 Else vier Science Ltd. All rights reserved.