Fully monolithic integrated 43 Gbit/s clock and data recovery circuit in InPHEMT technology

Authors
Murata, K Sano, K Sano, E Sugitani, S Enoki, T
Citation
K. Murata et al., Fully monolithic integrated 43 Gbit/s clock and data recovery circuit in InPHEMT technology, ELECTR LETT, 37(20), 2001, pp. 1235-1237
Citations number
9
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
37
Issue
20
Year of publication
2001
Pages
1235 - 1237
Database
ISI
SICI code
0013-5194(20010927)37:20<1235:FMI4GC>2.0.ZU;2-A
Abstract
A fully monolithic integrated 43 Gbit/s clock and data recovery circuit for optical fibre communication systems is described. The circuit is based on a phase-locked loop technique, and the input data signal is regenerated wit h the data-rate clock signal. The circuit was fabricated with 0.1 mum gate- length InAlAs/InGaAs/InP HEMTs, and error-free operation was confirmed for 2(31) - 1 PRBS data signal at 43 Gbit/s.