Piezoresistive cantilevers with dimensions of 200 x 50 x 1.8 mum(3) have be
en fabricated from polycrystalline silicon using reactive ion etching (RIE)
and back etching processes. Full Wheatstone bridges have been designed sym
metrically on-chip, with two resistors placed on the cantilevers and two re
sistors on the substrate. The differential measurements of the two cantilev
ers can reduce the thermal shift of the signal in the system and the extern
al noise in the laboratory. The characteristics of the fabricated cantileve
rs have been analysed by measuring the noise and the sensitivity. The measu
red noise spectra show that the 1/f noise is the dominant noise source at l
ow frequencies. With the linear relation between 1/f noise and bias voltage
s, the Hooge factor (alpha) was calculated to be 0.0067. The 1/f noise was
explained in terms of a lattice scattering model, which occurs in the deple
tion region of the grains. The displacement sensitivity of the cantilevers
(DeltaR/Rz(-1)) was calculated to be 1 x 10(-6)nm(-1) by measuring the resi
stance change and the vertical deflection of the cantilever. The gauge fact
or of the piezoresistive cantilever was calculated to be 19. At a 3V bias v
oltage and 1000 Hz measurement bandwidth, I mn of minimum detectable deflec
tion has been obtained.