We have exploited a recently-developed, through-wafer via technology in sil
icon to implement a novel Faraday cage scheme for substrate crosstalk suppr
ession in system-on-chip (SOC) applications. The Faraday cage structure con
sists of a ring of grounded vias encircling sensitive or noisy portions of
a chip. The via technology features high aspect ratio, through-wafer holes
filled with electroplated Cu and lined with a silicon nitride barrier layer
. The new Faraday cage structure has shown crosstalk suppression of 40 dB a
t 1 GHz and 36 dB at 5 GHz at a distance of 100 mum. This is about 10 dB be
tter than any other isolation technique previously reported.