HARDWARE IMPLEMENTATION OF AN ARTIFICIAL NEURAL-NETWORK USING FIELD-PROGRAMMABLE GATE ARRAYS (FPGAS)

Authors
BOTROS NM ABDULAZIZ M
Citation
Nm. Botros et M. Abdulaziz, HARDWARE IMPLEMENTATION OF AN ARTIFICIAL NEURAL-NETWORK USING FIELD-PROGRAMMABLE GATE ARRAYS (FPGAS), IEEE transactions on industrial electronics, 41(6), 1994, pp. 665-667
Citations number
NO
Categorie Soggetti
Instument & Instrumentation","Engineering, Eletrical & Electronic
Journal title
IEEE transactions on industrial electronics → ACNP
ISSN journal
02780046
Volume
41
Issue
6
Year of publication
1994
Pages
665 - 667
Database
ISI
SICI code
0278-0046(1994)41:6<665:HIOAAN>2.0.ZU;2-5
Abstract
In this paper we present a hardware implementation of a fully digital multi-layer perceptron artificial neural network using Xilinx Field Pr ogrammable Gate Arrays (FPGAs). Each node is implemented with two XC30 42 FPGAs and a 1K x 8 EPROM. Training is done off-line on a PC. We hav e tested successfully the performance of the network.