RTL-based functional test generation for high defects coverage in digital systems

Functional test has long been viewed as unfitted for high-quality productio n test. The purpose of this paper is to propose a RTL-based test generation methodology which can rewardingly be used both for design validation and t o enhance the test effectiveness of classic, gate-level test generation. Th e proposed methodology leads to high Defects Coverage (DC) and to relativel y short test sequences, thus allowing low-energy operation in test mode. Th e test effectiveness, regarding DC, is shown to be weakly dependent on the structural implementation of the behavioral description. The usefulness of the methodology is ascertained using the VeriDOS simulation environment and the CMUDSP and Torch ITC'99 benchmark circuits.