Silicon-on-insulator processes for the fabrication of novel nanostructures

Citation
S. Bourland et al., Silicon-on-insulator processes for the fabrication of novel nanostructures, J VAC SCI B, 19(5), 2001, pp. 1995-1997
Citations number
12
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science","Material Science & Engineering
Journal title
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B
ISSN journal
10711023 → ACNP
Volume
19
Issue
5
Year of publication
2001
Pages
1995 - 1997
Database
ISI
SICI code
1071-1023(200109/10)19:5<1995:SPFTFO>2.0.ZU;2-Y
Abstract
In this brief report, we discuss novel single crystal structures for electr onic device and microelectromechanical system applications using processes that employ selective epitaxial growth (SEG) and silicon-on-insulator (SOI) wafers. Selective epitaxial growth of silicon is used to provide robust, r eliable mechanical and electrical contacts between the SOI layer and the su bstrate. Subsequent removal of the buried oxide results in single crystal s tructures suspended in air. The films can then be thinned using wet or dry etching or thinned using sacrificial oxidation steps with the possibility o f forming ultrathin SOI layers. Diodes formed at the substrate-SEG junction demonstrate high breakdowns and low leakage indicating good electrical iso lation between the SOI layer and the substrate. The silicon on air regions can be used for dual-gate metal-oxide-semiconductor devices, quantum wires, cantilevers, as a substrate for lattice mismatched epitaxy, ultrathin SOIs , and lateral field emission tips. (C) 2001 American Vacuum Society.