A decision feedback equalizer (DFE) with digital error detection and correc
tion Implements a fixed-delay tree search with depth of 2. The disk-drive r
ead waveform, is first equalized to EPR4 for clock recovery and then re-equ
alized to the DFE target. A mostly analog implementation of this read chann
el in 0.6-mum CMOS implements a tapped delay-line forward filter with a cas
cade of track-and-hold circuits and variable transconductors. Using MTR (2,
k) code, the compact read channel IC surpasses a conventional EPR4 read cha
nnel with Viterbi detector at user densities in the range 2.0-3.0.