PROCESS OPTIMIZATION AND CHARACTERIZATION OF PBT STRUCTURES

The Permeable Base Transistor (PET) is considered to be a high frequen cy device with simulated f(T) and f(max) values in the order of 100 GH z In this work we present several PET devices in silicon. The fabricat ion process steps have been developed and optimised in order to meet t he demands of a future integration in a standard CMOS processing. Coba lt disilicide is used for the emitter metallization and base metallisa tion in order to form a good Schottky contact The important issues of a fabrication process reliability and controllability are discussed in this paper. The process steps had been analysed by standard analysis methods. Electrical (DC) characterisation of the devices has been perf ormed. The obtained results are in a good agreement with the 2D simula tions.