A neuromorphic VLSI device for implementing 2-D selective attention systems

Selective attention is a mechanism used to sequentially select and process salient subregions of the input space, while suppressing inputs arriving fr om nonsalient regions. By processing small amounts of sensory information i n a serial fashion, rather than attempting to process all the sensory data in parallel, this mechanism overcomes the problem of flooding limited proce ssing capacity systems with sensory inputs. It is found in many biological systems and can be a useful engineering tool for developing artificial syst ems that need to process in real-time sensory data. In this paper we presen t a neuromorphic hardware model of a selective attention mechanism implemen ted on a very large scale integration (VLSI) chip, using analog circuits. T he chip makes use of a spike-based representation for receiving input signa ls, transmitting output signals and for shifting the selection of the atten ded input stimulus over time. It can be interfaced to neuromorphic sensors and actuators, for implementing multichip selective attention systems. We d escribe the characteristics of the circuits used in the architecture and pr esent experimental data measured from the system.