CHARACTERIZATION OF FLASH STRUCTURES ERASED WITH ULTRASHORT PULSES

Flash memories are normally erased by means of high-field electron tun nelling from the floating gate into the source. As a consequence the t ime needed is generally two orders of magnitude larger (approximate to 1 ms vs. approximate to 10 mu s) than that used for writing, and is o btained by means of much higher currents due to channel hot electrons. It is important therefore to determine whether it is possible to redu ce the erase time, in order to make it comparable with that used for w riting. With regard to such a problem, this work describes the results of a comprehensive and detailed characterization of flash structures aimed at evaluating how ultra-short, high voltage erasing pulses affec t the reliability of the device.