Hardware compiler realising concurrent processes in reconfigurable logic

Reconfigurable computers based on field programmable gate array technology allow applications to be realised directly in digital logic. The inherent c oncurrency of hardware distinguishes such computers from microprocessor-bas ed machines in which the concurrency of the underlying hardware is fixed an d abstracted from the programmer by the software model. However, reconfigur able logic provides us with the potential to exploit 'real' concurrency. It is therefore interesting to know how to exploit this concurrency, how to m odel concurrent computations, and which languages allow this dynamic hardwa re to be programmed most effectively. The purpose of this work is to descri be an FPGA compiler for the Circal process algebra. In so doing, the author s demonstrate that behavioural descriptions expressed in a process algebrai c language can be readily and intuitively compiled to reconfigurable logic and that this contributes to the goal of discovering appropriate high-level languages for run-time reconfiguration.