Electrical linewidth test structures patterned in (100) silicon-on-insulator for use as CD standards

Electrical test structures known as cross-bridge resistors have been patter ned in (100) epitaxial silicon material that was grown on Bonded and Etched -back Silicon-On-Insulator (BESOT) substrates. The critical dimensions (CDs ) of a selection of their reference segments have been measured electricall y, by scanning-electron microscopy (SEM), and by lattice-plane counting. Th e lattice-plane counting is performed on phase-contrast images of the cross sections of the reference segments that are produced by high-resolution tr ansmission-electron microscopy (HRTEM). The reference-segment features were aligned with (110) directions in the BESOT surface material. They were def ined by a silicon micromachining process that resulted in their sidewalls b eing nearly atomically planar and smooth and inclined at 54.737 degrees to the surface (100) plane of the substrate. SEM, HRTEM, and electrical CD (EC D) linewidth measurements have been made on features of various drawn dimen sions on the same substrate to investigate the feasibility of a CD traceabi lity path that combines the low cost, robustness, and repeatability of ECD metrology and the absolute measurement of the HRTEM lattice-plane counting technique. Other novel aspects of the (100) silicon-on-insulator (SOI) impl ementation that are reported here are the ECD test-structure architecture a nd the making of lattice-plane counts from cross-sectional HRTEM imaging of the reference features. This paper describes the design details and the fa brication of the cross-bridge resistor test structure. The long-term goal i s to develop a technique for the determination of the absolute dimensions o f the trapezoidal cross sections of the cross-bridge resistors' reference s egments, as a prelude to making them available for dimensional reference ap plications.