A simple and direct technique for interface characterization of SOI MOSFETs and its application in hot carrier degradation studies in sub-100 nm JVD MNSFETs

Conventional interface characterization techniques, such as charge pumping, cannot be applied to SOI devices due to lack of a substrate contact in the se devices. A lock-in-amplifier based multi-frequency transconductance tech nique for interface characterization of sub-micron SOI MOSFETs has been imp lemented and used to study generation of interface states with stress. The technique has been validated on bulk MOSFETs using charge pumping measureme nts. Subsequently, it has been used to characterize hot carrier generated i nterface states in 100 nm SOI MNSFETs with silicon nitride gate dielectric deposited by the Jet-Vapor-Deposition process. Hot carrier stress studies o n these MNSFETs show that the degradation is marginally lower in SOI MNSFET s as compared to identical bulk devices. This can be attributed to lower fi elds, and therefore impact generation, and absence of hot carriers caused b y injection of carriers from the substrate. (C) 2001 Published by Elsevier Science B.V.