Thin film transistors fabricated by in situ doped unhydrogenated polysilicon films obtained by solid phase crystallization

High-mobility low-temperature (less than or equal to 600 degreesC) unhydrog enated in situ doped polysilicon thin film transistors (TFTs) are Made. Pol ysilicon layers are grown by a low pressure chemical vapour deposition (LPC VD) technique and crystallized in a vacuum by thermal annealing. The source and drain regions are in situ doped. The gate insulator is made of an atmo spheric pressure chemical vapour deposition (APCVD) silicon dioxide. Hydrog en passivation is not performed on the transistors. One type of transistor is made of two polysilicon layers, the other one is fabricated from a singl e polysilicon layer. The electrical properties are better for transistors m ade of a single polysilicon layer: a low threshold voltage (1.2 V), a subth reshold slope S = 0.7 V/dec, a high field effect mobility (approximate to 1 00 cm(2) V-1 s(-1)) and an on/off-state current ratio higher than 10(7) for a drain voltage V-ds = 1 V. At low drain voltage, for both transistors, th e off-state current results from a pure thermal emission of trapped carrier s. However, at high drain voltage, the electrical behaviour is different: i n the case of single polysilicon TFTs, the current obeys the field-assisted (Poole-Frenkel) thermal emission model of trapped carriers while for TFTs made of two polysilicon layers, the higher off-state current results from a field-enhanced thermal emission.