In this paper we describe the use of model-based diagnosis for locating bug
s in hardware designs. Nowadays hardware designs are written in a programmi
ng language. We restrict our view to hardware designs written in a subset o
f the commonly used hardware description language VHDL. This subset include
s all synthesize-able (register transfer level (RTL)) programs, i.e., progr
ams that can be automatically converted into a gate level representation. T
herefore almost all VHDL programs are RTL programs. We show the conversion
of VHDL programs into a logical representation. This representation is a mo
del that can be directly used by a model-based diagnosis engine for computi
ng diagnoses. The resulting diagnoses are mapped back to the VHDL code frag
ments of the original program explaining a misbehavior. In addition, we spe
cify some rules optimizing the obtained results. We further present some ar
guments showing that the proposed debugging technique scales up to large de
signs.