Compiler support for scalable and efficient memory systems

Citation
R. Barua et al., Compiler support for scalable and efficient memory systems, IEEE COMPUT, 50(11), 2001, pp. 1234-1247
Citations number
34
Categorie Soggetti
Computer Science & Engineering
Journal title
IEEE TRANSACTIONS ON COMPUTERS
ISSN journal
00189340 → ACNP
Volume
50
Issue
11
Year of publication
2001
Pages
1234 - 1247
Database
ISI
SICI code
0018-9340(200111)50:11<1234:CSFSAE>2.0.ZU;2-#
Abstract
Technological trends require that future scalable microprocessors be decent ralized. Applying these trends toward memory systems shows that the size of the cache accessible in a single cycle will decrease in a future generatio n of chips. Thus, a bank-exposed memory system comprised of small, decentra lized cache banks must eventually replace that of a monolithic cache. This paper considers how to effectively use such a memory system for sequential programs. This paper presents Maps, the software technology central to bank -exposed architectures, which are architectures with bank-exposed memory sy stems. Maps solves the problem of bank disambiguation-that of determining a t compile-time which bank a memory reference is accessing. Bank disambiguat ion is important because it enables the compile-time optimization for data locality, where data can be placed close to the computation that requires i t. Two methods for bank disambiguation are presented: equivalence-class uni fication and modulo unrolling. Experimental results are presented using a c ompiler for the MIT Raw machine, a bank-exposed architecture that relies on the compiler to 1) manage its memory and 2) orchestrate its instruction le vel parallelism and communication. Results on Raw using sequential codes de monstrate that using bank disambiguation improves performance by a factor o f 3 to 5 over using ILP alone.