Fault diagnosis for linear analog circuits

This paper presents a novel scheme to diagnose single and double faults for linear analog circuits. The scheme first proposes a simple transformation procedure to transform the tested linear analog circuit into a discrete sig nal flow graph, then constructs "diagnosing evaluators," which model the fa ulty components, to form a diagnosis configuration to diagnose the faults t hrough digital simulation. This saves much computation time. Furthermore, a simple method to un-power OP's is also proposed to differentiate equivalen t faults. The scheme can diagnose faults in passive components as well as a ctive faults in OP's.