High performance level restoration circuits

Three high performance level restoration circuits are proposed, which outpe rform the existing level restoration circuits with cross-coupled PMOS, in t erms of power dissipation and delay. The first configuration employs a back -bias scheme in order to eliminate the stand-by leakage caused by the low-s wing input. The second one adopts a bootstrapping technique, in order to re store the low-swing signal, without dc power consumption. Finally, a level restoration circuit is proposed, based on the generation of a narrow zero-p ulse, for properly controlling the output PMOS device. The presented level restoration circuits can be implemented in standard CMOS technologies. By s imulating the proposed circuits on a low-swing interconnect scheme, a 60% p ower savings have been observed over the conventional full-swing case. (C) 2001 Elsevier Science Ltd. All rights reserved.