Wafer-to-wafer bonding of nonplanarized MEMS surfaces using solder

The fabrication and reliability of a solder wafer-to-wafer bonding process is discussed. Using a solder reflow process allows vacuum packaging to be a ccomplished with unplanarized complementary metal-oxide semiconductor (CMOS ) surface topography. This capability enables standard CMOS processes, and integrated microelectromechanical systems devices to be packaged at the chi p-level. Alloy variations give this process the ability to bond at lower te mperatures than most alternatives. Factors affecting hermeticity, shorts, Q values, shifting cavity pressure, wafer saw cleanliness and corrosion resi stance will be covered.