Facile: A language and compiler for high-performance processor simulators

Citation
Ec. Schnarr et al., Facile: A language and compiler for high-performance processor simulators, ACM SIGPL N, 36(5), 2001, pp. 321-331
Citations number
14
Categorie Soggetti
Computer Science & Engineering
Journal title
ACM SIGPLAN NOTICES
ISSN journal
15232867 → ACNP
Volume
36
Issue
5
Year of publication
2001
Pages
321 - 331
Database
ISI
SICI code
1523-2867(200105)36:5<321:FALACF>2.0.ZU;2-8
Abstract
Architectural simulators are essential tools for computer architecture and systems research and development. Simulators, however, are becoming frustra tingly slow, because they must now model increasingly complex micro-archite ctures running realistic workloads. Previously, we developed a technique ca lled fast-forwarding, which applied partial evaluation and memoization to i mprove the performance of detailed architectural simulations by as much as an order of magnitude [14]. While writing a detailed processor simulator is difficult, implementing fas t-forwarding is even more complex. This paper describes Facile, a domain-sp ecific language for writing detailed, accurate micro-architecture simulator s. Architectural descriptions written in Facile can be compiled, using part ial evaluation techniques, into fast-forwarding simulators that achieve sig nificant performance improvements with far less programmer effort. Facile a nd its compiler make this performance-enhancing technique accessible to com puter architects.