Silicon-on-insulator substrates with buried tungsten silicide layer

Tungsten silicide layers can be incorporated into silicon-on-insulator (SOI ) substrates produced by direct wafer bonding. The series resistance of col lectors/drains in bipolar or smart-power circuits can be reduced to 2 Omega /sq. The outdiffusion of the buried implanted collector contact during the post-bond anneal can be eliminated by using rapid diffusivity of donors an d accepters in tungsten silicide subsequent to bond anneal. Optimisation of this process can provide better matching of vertical complementary bipolar transistors. A novel silicon-on-silicide-on-insulator structure is propose d for integrating p-i-n diodes with low loss coplanar wave-guide lints. Thi s incorporates a polysilicon surface layer on the high resistivity handle w afer and a tungsten silicide back contact to the diode. CPW lines with micr owave losses of 2 dB/cm have been obtained at 30 GHz. The incorporation of a tungsten silicide laver below the buried silicon dioxide layer can be use d as a ground plane. A tungsten silicide ground plane used with a standard SOI test structures was found to increase the suppression of cross-talk by 20 dB in the frequency range 1-10 GHz. Other potential applications such as ground plane and double-gate MOSFETs are discussed. (C) 2001 Elsevier Scie nce Ltd. All rights reserved.