This paper is devoted to the analysis of the electrical processes in SOI SI
MOX structures in a wide temperature range (from 4 to 700 K) by a combinati
on of capacitance-voltage and thermally stimulated current techniques. It h
as been shown that application of such techniques at cryogenic temperatures
allows to study the processes in the transition layer and in the buried in
sulator/substrate interface. Employing a combination of these methods at hi
gh temperatures gives the possibility to investigate emission from and trap
ping at deep traps and to determine the localization of such traps. It has
been shown that high-temperature charge instability processes in the buried
oxide adversely affect the SOI MOSFET operation. (C) 2001 Elsevier Science
Ltd. All rights reserved.