Low-voltage fourth-order CMOS sigma-delta modulator implementation

Authors
Lampinen, H Vainio, O
Citation
H. Lampinen et O. Vainio, Low-voltage fourth-order CMOS sigma-delta modulator implementation, ELECTR LETT, 37(12), 2001, pp. 734-735
Citations number
9
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
37
Issue
12
Year of publication
2001
Pages
734 - 735
Database
ISI
SICI code
0013-5194(20010607)37:12<734:LFCSMI>2.0.ZU;2-J
Abstract
A low-voltage, high-speed fourth-order sigma-delta modulator implementation is presented. The low-voltage and high-speed operation are obtained by usi ng a novel combination of architectural features, proper circuit structure selections, specific clocking strategies, and efficient circuit optimisatio n algorithms. Measurement results from fabricated CMOS chip prototypes show a good match with simulations.