On the speedup required for a multicast parallel packet switch

Citation
S. Iyer et N. Mckeown, On the speedup required for a multicast parallel packet switch, IEEE COMM L, 5(6), 2001, pp. 269-271
Citations number
9
Categorie Soggetti
Information Tecnology & Communication Systems
Journal title
IEEE COMMUNICATIONS LETTERS
ISSN journal
10897798 → ACNP
Volume
5
Issue
6
Year of publication
2001
Pages
269 - 271
Database
ISI
SICI code
1089-7798(200106)5:6<269:OTSRFA>2.0.ZU;2-M
Abstract
A parallel packet switch (PPS) is a switch in which the memories run slower than the line rate. Arriving packets are load-balanced packet-by-packet ov er multiple lower speed center stage packet switches. It is known that, for unicast traffic, a PPS can precisely emulate a FCFS output-queued (OQ) swi tch with a speedup of two and an OQ switch with delay guarantees with a spe edup of three. In this paper we ask: Is it possible for a PPS to emulate th e behavior of an OQ multicast switch? The main result is that for multicast traffic an N-port PPS can precisely emulate a FIFO OQ switch with a speedu p of S > 2 rootN+1, and a switch that provides delay guarantees with a spee dup of S > 2 root 2N+2.