Two silicon nitride technologies for post-SiO2 MOSFET gate dielectric

Citation
Q. Lu et al., Two silicon nitride technologies for post-SiO2 MOSFET gate dielectric, IEEE ELEC D, 22(7), 2001, pp. 324-326
Citations number
13
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE ELECTRON DEVICE LETTERS
ISSN journal
07413106 → ACNP
Volume
22
Issue
7
Year of publication
2001
Pages
324 - 326
Database
ISI
SICI code
0741-3106(200107)22:7<324:TSNTFP>2.0.ZU;2-O
Abstract
P-MOSFETs with 14 Angstrom equivalent oxide thickness (EOT) were fabricated using both JVD Si3N4 and RTCVD Si3N4/SiOxNy gate dielectric technologies. With gate length down to 80 nm, the two technologies produced very similar device performances, such as drive current and gate tunneling current. The low gate leakage current, good device characteristics and compatibility wit h conventional CMOS processing technology make both nitride gate dielectric s attractive candidates for post-SiO2 scaling. The fact that two significan tly different technologies produced identical results suggests that the pro cess window should be quite large.