Process and electrical (modulator) efficiency of plasma immersion ion implantation

Plasma immersion ion implantation (PIII) has been shown to be an effective surface modification technique. In PIII processes, the implantation voltage has a large impact on the process and electrical (modulator) efficiency. F or experiments in which the sample temperature is raised to a constant valu e by ion bombardment only-without external heating-our simulation studies r eveal that the low-voltage mode featuring a higher ion current density give s rise to a higher electrical efficiency with regard to both single- and ba tch-processing; The low-voltage mode also produces a thinner plasma sheath and lower energy loss to the passive resistor. The hardware capacitance is responsible for the reduction in the electrical efficiency, For Pm experime nts conducted under typical conditions, e,g,, plasma density of 5.0 x 10(9) cm(-3), implanted area of 0.08 m(2), and employing a 10 k Ohm pull-down re sistor for operations between 1 kV and 100 kV, the efficiency of the power modulator is quite low and generally less than 50% exclusive of the ineffic iency stemming from secondary electrons. Our results demonstrate that the l ow-voltage, small pulse-duration operating mode has higher implantation eff iciency compared to conventional high-voltage Pill. This can be attributed to the higher effective implantation efficiency eta (e), resulting from the smaller secondary electron coefficient at a lower voltage and higher elect rical efficiency eta (p) in the low-voltage, short-pulsewidth operating mod e, Our work suggests that both the total implantation efficiency eta total and modification efficacy can be improved by elevated-temperature, high-fre quency, low-voltage PIII.