Defect-oriented test scheduling

As tester complexity and cost increase, reducing test time is an important manufacturing priority. Test time can be reduced by ordering tests so as to fail defective units early in the test process. Algorithms to order tests that guarantee optimality require execution time that is exponential in the number of tests applied. We develop a simple polynomial-time heuristic to order tests. The heuristic, based on criteria that offer local optimality, offers globally optimal solutions in many cases, An ordering algorithm requ ires information on the ability of tests to detect defective units. One way to obtain this information is by simulation. We obtain it by applying all possible tests to a small subset of manufactured units and assuming the inf ormation obtained from this subset is representative. The ordering heuristi c was applied to manufactured digital and analog integrated circuits (ICs) tested with commercial testers. When both approaches work, the orders gener ated by the heuristic are optimal. More importantly, the heuristic is able to generate an improved order for large problem sizes when the optimal algo rithm is not able to do so. The new test orders result in a significant red uction, as high as a factor of four, in the time needed to identify defecti ve units. We also assess the validity of using such sampling techniques to order tests.