TWISTED BIT-LINE TECHNIQUE FOR MULTIGIGABIT DRAMS

Authors
MIN DS LANGER DW
Citation
Ds. Min et Dw. Langer, TWISTED BIT-LINE TECHNIQUE FOR MULTIGIGABIT DRAMS, Electronics Letters, 33(16), 1997, pp. 1380-1382
Citations number
5
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
Electronics Letters → ACNP
ISSN journal
00135194
Volume
33
Issue
16
Year of publication
1997
Pages
1380 - 1382
Database
ISI
SICI code
0013-5194(1997)33:16<1380:TBTFMD>2.0.ZU;2-N
Abstract
A new twisted bit-line (TBL) technique is presented to reduce bit-line coupling noise for multi-gigabit DRAMs. Sufficient noise reduction ef fects have been monitored through soft-error rate measurement on test chips using the proposed TBL technique. Also, the problem of excessive chip area penalty in the conventional TBL technique can be solved in the proposed TBL technique.