FunState - An internal design representation for codesign

In this paper, an internal design model called FunState (functions driven b y state machines) is presented that enables the representation of different types of system components and scheduling mechanisms using a mixture of fu nctional programming and state machines, It is shown how properties relevant for scheduling and verification of spec ification models such as Boolean dataflow, cyclostatic dataflow, synchronou s dataflow, marked graphs, and communicating state machines as well as Petr i nets can be represented in the FunState model of computation, Examples of methods suited for FunState are described, such as scheduling and verifica tion. They are based on the representation of the model's state transitions in the form of a periodic graph, The feasibility of the novel approach is shown with an asynchronous transfer mode switch example.