Compact central arbiters for memories with multiple read/write ports

Authors
Omori, N Mattausch, HJ
Citation
N. Omori et Hj. Mattausch, Compact central arbiters for memories with multiple read/write ports, ELECTR LETT, 37(13), 2001, pp. 811-813
Citations number
5
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
37
Issue
13
Year of publication
2001
Pages
811 - 813
Database
ISI
SICI code
0013-5194(20010621)37:13<811:CCAFMW>2.0.ZU;2-6
Abstract
Fast and compact central arbiter circuits for detection and regulation of a ccess conflicts in memories with multiple ports are proposed. A layout stud y in 0.5 mum, 2 metal CMOS technology verifies that area-overhead and acces s time penalty are small up to 32 ports.