Real-time three-dimensional modular SAR preprocessor design

Authors
Citation
Hl. Chan et Ts. Yeo, Real-time three-dimensional modular SAR preprocessor design, ELECTR LETT, 37(13), 2001, pp. 853-855
Citations number
2
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
37
Issue
13
Year of publication
2001
Pages
853 - 855
Database
ISI
SICI code
0013-5194(20010621)37:13<853:RTMSPD>2.0.ZU;2-3
Abstract
The architecture design for a high-speed front-end video prefiltering is de scribed, this being part of an effort to develop a realtime range-doppler d igital SAR processor to produce image maps of the scanned area immediately as raw data are collected. The evolved architecture consists of three-dimen sionally interconnected planes of modified transverse FIR parallel tapped e lements. Both the range and azimuth prefilterings are performed simultaneou sly in a continuous input-output flow without the need to consider corner t urning. The computation load has been reduced to one complex multiplication and two complex additions.