The power consumption of active filters limits the achievable dynamic range
. In this paper, we start by considering ideal electronic building blocks,
and we derive the fundamental limits to the dynamic range of different topo
logies of continuous-time integrators, for a given power consumption. Then,
by using simplified nonideal circuit models, we present design guidelines
for the optimization of the dynamic range to power consumption ratio of the
integrators. We, thus, obtain practical limits to the dynamic range, as fu
nctions of the transition frequency of the transistors. We demonstrate the
possibility of approaching these limits by designing a practical CMOS circu
it: an 8-MHz second-order bandpass filter with Miller integrators, The perf
ormance of the biter was evaluated by HSPICE simulations, using full device
models; the resulting dynamic range to power consumption ratio is close to
the theoretical limits.