An efficient large-signal modeling method using load-line analysis and itsapplication to non-linear characterization of FET

An efficient large-signal modeling method of FET using load-line analysis i s proposed, and it is applied to non-linear characterization of FET. In thi s method, instantaneous drain-sourer voltage V-ds(t) and drain-source curre nt I-ds(t) waveforms are determined by load-line analysis while non-linear parameters in a large-signal equivalent circuit of FET are defined as the a verage values over one period corresponding to instantaneous V-ds(t) and I- ds(t) Output power (P-out), power added efficiency (eta (add)) and phase de viation calculated by using such an equivalent circuit of FET agree well wi th the measured results at 933.5 MHz. Phase deviation mechanism is explaine d based on the large-signal equivalent circuit of FET, and it is shown how non-linear parameters, such as trans-conductance (g(m)), drain-source resis tance (R-ds), gate-source capacitance (C-gs), and gate leak resistance (R-t g) contribute to positive or negative phase deviations. The difference betw een small-signal and large-signal S-parameters (S-11, S-12, S-21, S-22) is also discussed. The proposed large-signal modeling method is considered to be useful for the design of high power, high efficiency, and low distortion amplifiers as well as the investigation of tile behavior of FET in large-s ignal operating conditions.