Processing factors influencing the leakage current in shallow junction diodes for deep submicro-meter CMOS

Citation
L. Grau et al., Processing factors influencing the leakage current in shallow junction diodes for deep submicro-meter CMOS, J MAT S-M E, 12(4-6), 2001, pp. 211-214
Citations number
13
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science","Material Science & Engineering
Journal title
JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS
ISSN journal
09574522 → ACNP
Volume
12
Issue
4-6
Year of publication
2001
Pages
211 - 214
Database
ISI
SICI code
0957-4522(200106)12:4-6<211:PFITLC>2.0.ZU;2-A
Abstract
The impact of the well doping profile on the current-voltage (I-V) and capa citance-voltage (C-V) characteristics of cobalt-silicided n(+)-p and p(+)-n junction diodes fabricated in a 0.18 mum CMOS compatible processing scheme is studied. It will be shown that the nature of the junction (abrupt or li nearly graded) has a strong influence on the resulting leakage current. Mor eover, the extra thermal budget to create a nitrided gate oxide may drastic ally change the B-profile in the p-well and deteriorate the overall charact eristics. From a detailed analysis, it is concluded that the increased leak age current observed for the nitrided case occurs at the perimeter of the d iodes, where the Co-silicide may form a Schottky contact with the underlyin g n- or p-well. In order to control the leakage, the overall thermal budget should be optimized, particularly with respect to the back-end processing. (C) 2001 Kluwer Academic Publishers.