Self-heating effects in ICs on silicon-on-insulator (SOI) substrates are du
e to the thick buried oxide layer present in the SOI substrate. Silicon dio
xide has a poor thermal conductivity value (0.4-1.2 W K(-1)m(-1)), compared
with silicon (150 W K(-1)m(-1)). In order to minimize this self-heating, t
he use of multiple-layer structures as thermal vias (TV) is investigated. T
he vias have been fabricated as sandwich layers with thin SiO2 (20 nm) encl
osing low pressure chemical vapor deposited (LPCVD) silicon layers (1 mum),
all IC compatible materials. The LPCVD silicon layers consisted of either
polycrystalline silicon or a combination of amorphous silicon and polysilic
on. Electrical testing of the oxide/silicon structures has shown that inclu
sion of an amorphous silicon layer in the oxide sandwich improves the inter
face between the oxide and the silicon layer. This provides better electric
al stability with an operational capability > 30 V. The capacitance of the
multi-layer structure (96 pF), as measured at frequencies greater than or e
qual to1 MHz, confirms that the polysilicon behaves as a dielectric layer a
t these frequencies. Thermal conductivity assessment, using a four-terminal
resistor structure, shows that the multilayer via offers an improved therm
al conductivity (3.5 W K(-1)m(-1)) when compared to a 1-mum homogenous buri
ed oxide layer (0.8 W K(-1)m(-1)). (C) 2001 Kluwer Academic Publishers.