A static differential double edge-triggered flip-flop based on clock racing

In this paper, a double edge-triggered (DET) flip-flop is proposed, suitabl e for high-performance and low-power applications. The presented flip-Rep h as differential structure and provides static operation. The double edge tr iggering operation is achieved, by generating a narrow pulse immediately af ter each clocking edge, which is used to set the flip-flop in the transpare nt phase. The narrow pulse generation technique is based on a clock racing methodology. Compared to existing DET flip-flops, the proposed DET Rip-flop results in significant delay and power gains, but keeps the total transist or count low. By applying the narrow pulse to more than one similar adjacen t DET flip-flops, we can further reduce the power and the transistor count. (C) 2001 Elsevier Science Ltd. All rights reserved.