SILICON-CARBIDE MOSFET INTEGRATED-CIRCUIT TECHNOLOGY

The research and development activities carried out to demonstrate the status of MOS planar technology for the manufacture of high temperatu re SiC ICs will be described. These activities resulted in tile design , fabrication and demonstration of the World's first SiC analog IC - a monolithic MOSFET operational amplifier. Research tasks required for the development of a plan ar SiC MOSFET IC technology included charact erization of the SiC/SiO2 interface using thermally grown oxides. high temperature (350 degrees C) reliability studies of thermally grown ox ides; ion implantation studies of donor (N) and acceptor (B) dopants t o form junction diodes; epitaxial layer characterization; N channel in version and depletion mode MOSFETs; device isolation methods and final ly integrated circuit design, fabrication and testing of the World's f irst monolithic SiC operational amplifier IC. These studies defined a SiC n-channel depletion mode MOSFET IC technology and outlined tasks r equired to improve all types of SiC devices. For instance, high temper ature circuit drift instabilities at 350 degrees C were discovered and characterized. This type of instability needs to be understood and re solved because it affects the high temperature reliability of other ty pes of SIC devices. Improvements in SiC wafer surface quality and the use of deposited oxides instead of thermally grown SiO2 gate dielectri cs will probably be required for enhanced reliability. Tile slow rever se recovery time exhibited by n(+)-p diodes formed by N ion implantati on is a problem that needs to be resolved for all types of planar bipo lar del ices. The reproducibility of acceptor implants needs to be imp roved before CMOS ICs and many types of power device structures will b e manufacturable.