Nested Miller compensation in low-power CMOS design

Citation
Kn. Leung et Pkt. Mok, Nested Miller compensation in low-power CMOS design, IEEE CIR-II, 48(4), 2001, pp. 388-394
Citations number
15
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
ISSN journal
10577130 → ACNP
Volume
48
Issue
4
Year of publication
2001
Pages
388 - 394
Database
ISI
SICI code
1057-7130(200104)48:4<388:NMCILC>2.0.ZU;2-F
Abstract
First, new stability conditions for low-power CMOS nested Miller compensate d amplifiers are given in this brief. Then, an improved structure, which ta kes the advantages of a feedforward transconductance stage and a nulling re sistor, is introduced. Experimental results prove that the proposed structu re improves the frequency response, transient response, and power supply re jection ratio without increasing the power consumption and circuit complexi ty.