The electrical properties of a thin (350 Angstrom) layer deposited on
a molecular beam epitaxial grown Si0.89Ge0.11/Si(001) heterostructure
and subsequently annealed at T-a=550-800 degrees C were studied in a w
ide (80-325 K) temperature range. Annealing at 800 degrees C produces
a single reaction product, the C54 phase of Ti(SiGe)(2), while lower t
emperature anneals result in the coexistence of a few intermetallic co
mpounds. It was found that while for annealing temperatures lower than
800 degrees C, the Fermi level is pinned with respect to the conducti
on band, annealing at 800 degrees C results in Fermi level partial pin
ning with respect to the valence band. The current flow in this case i
s controlled mainly by thermionic emission in the presence of interfac
e states. Two kinds of traps were observed by deep level transient spe
ctroscopy in the barrier region after the 800 degrees C annealing. Acc
eptor-like traps with an activation energy of approximate to 0.45-0.5
eV, a capture cross-section sigma(a)=1.3 x 10(-12) cm(2), and a densit
y D-t approximate to 3 x 10(13) eV(-1) cm(-2), which most likely origi
nate from the strain relaxation in the SiGe epilayer, were found to be
responsible for the partial Fermi level pinning at the interface. Ele
ctron traps with an activation energy of approximate to 0.17 eV and a
capture cross-section sigma(d)=7.7 x 10(-16) cm(2) were also identifie
d and attributed to the SiGe epilayer; they are assumed to originate f
rom a well-known vacancy-oxygen center. (C) 1997 American Institute of
Physics.